Direct memory access (DMA) is a method for direct communication from a peripheral (input/output (I/O) device) to memory or directly between peripheral devices. Utilizing DMA, bytes are moved by an I/O controller, such as a DMA controller, without intervention. In order to perform DMA operations, an I/O channel is provided with the I/O or DMA controller which gains control of the bus (or busses), accesses the devices and notifies the CPU that the memory operation has been completed. DMA controllers operate in accordance with either channel control blocks (CCBs) or channel programs which are used to specify various operating parameters of DMA transfer such as the data location and data size.
The use of CCBs provides for the more efficient storage, transfer and execution of the DMA parameters to the DMA channel and does not restrict the number of pages that are to be a part of the I/O transaction. The I/O controller or DMA controller is equipped with an additional register referred to as the data chain register (DCR) which contains a pointer to a chain of a predetermined number of blocks of DMA channel control parameters located in the main memory of the I/O controller. A flag in the DMA parameter block indicates whether chaining to a subsequent block should be continued. However, the number of channel control blocks that may be chained together is limited by the amount of memory allocated on the I/O controller chip for storage of channel control blocks and may typically be only enough room to store two or three channel control blocks.
An alternative method for providing chaining is to provide the I/O controller with a memory and processor to execute microcode stored in the memory. In systems that employ this method, such as the IBM 7090, 7080 and System 360 manufactured by International Business Machines (IBM), Armonk, N.Y., an Input/Output (I/O) transaction is started by issuing a Start I/O (SIO) instruction. The instruction provides the effective address which points to the channel program to operate the I/O device. A channel program is then fetched from memory starting at the SIO effective address. Two types of information are transferred by the channel program: blocks of data and channel instructions. Channel instructions include a stop instruction and jump instruction. The stop instruction completes the I/O transaction and the jump instruction changes the address of the next instruction of the channel program to be executed.
In order to provide a more powerful and flexible controller, the technique of dynamic chaining was developed. Dynamic chaining permits on-the-fly chaining of I/O commands to the channel program. To achieve dynamic chaining, an addendum to the channel program is created by inserting a jump instruction before the last instruction, the stop instruction, of the channel program. The jump instruction points to another location in memory which contains the I/O command(s) added to the chain. Although this technique provides the capability of dynamically chaining instructions, a race condition arises due to the difficulty in ensuring that the change in the microcode is written prior to the code execution reaching the point of the change.